Design-Reuse

Structured ASIC Based SoC Design

Complex System-on-Chip (SoC) designs are fast becoming commonplace in today’s applications. Hardware designers must overcome many complex and challenging issues regarding cost, time-to-market (TTM), ...
EDN

Best practices for structured-ASIC design

Given the increasing nonrecurring engineering charges and long design schedules associated with deep-submicron standard-cell ASICs, the use of structured ASICs for custom IC design is an increasingly ...
EDN

ASIC-Style Design Techniques for Programmable Devices

Advances in process technology are enabling a profound increase in the number of commercial applications for field programmable gate arrays (FPGAs). Technology breakthroughs from 10-million gate ...
Design-Reuse

Improving ASIC Design Verification using FPGAs and Structured ASICs

Structured ASICs require developers to re-program only the top level metal layers when customizing their designs, enabling faster development time and low unit cost. However, many structured ASICs ...
Ars Technica

ASIC design/verification or embedded systems programming

1. In a big company, doing ASIC design verification for a WCDMA modem for 3G cellular chips. 2. Small company, doing Embedded Software Programming. Working on the design and implementation of layer 1 ...
Electronic Design

7-nm ASIC Technology Sets Sights on Future Data Centers

7-nm ASIC technology benefits in the semiconductor industry. Role of the 7-nm ASIC advanced node in data centers. Cost trends of advanced nodes in the semiconductor industry. As more consumers embrace ...