The traditional approach to moving scan test data from chip-level pins to core-level scan channels is under pressure due to the dramatic rise in design size, design complexity, and test adaptation. To ...

About a dozen years ago, the world of test had reached an economic impasse: most digital designs had become sufficiently complex that standard scan testing techniques were no longer cost-effective.

As design size and complexity increase, so too does the cost of test. Both the design community and the test industry are looking at various approaches to lower the cost of manufacturing test. This ...

For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...

Despite its standardization as IEEE 1149.1 in 1990 and wide use in the industry, many test engineers and developers still do not fully understand the benefits of boundary scan test. The misconceptions ...

At Alcatel-Lucent, we test chassis-level products that provide 42 board slots on a midplane, essentially a passive backplane that accepts boards on its front and rear sides. Thirty-four of those slots ...